Electrical circuit arrangement for converting an electrical input variable into an impressed output electrical voltage

ABSTRACT

An electrical voltage arrangement is to be provided with which different electrical input variables, for example in the form of a unidirectional voltage, a bidirectional voltage or a unidirectional current, can be converted into an impressed electrical output voltage. At the same time, there is to be a predefined relationship between the input variable and the output voltage. The circuit arrangement contains a first arithmetic circuit which converts a voltage fed to it into a first impressed voltage, and a second arithmetic circuit which converts an input voltage fed to it into a second impressed voltage. The voltage which is present at the input terminals of the circuit arrangement is fed to the first arithmetic circuit. The voltage which drops across a resistor which can be connected to the input terminals of the circuit arrangement is fed to the second arithmetic circuit. If the input variable which is to be converted is a voltage, the output voltage of the first arithmetic circuit is used as an output voltage of the circuit arrangement. If the input variable which is to be converted is a current, the current is fed to the resistor, and the output voltage of the second arithmetic circuit is used as the output voltage of the circuit arrangement. The circuit arrangement is provided for use in automation equipment.

[0001] The invention relates to an electrical circuit arrangement forconverting an electrical input variable (voltage or current) into animpressed electrical output voltage as claimed in the preamble of claim1.

[0002] In automation equipment, actual values and setpoint values, aswell as control signals, are being increasingly linked bymicroprocessors. In many cases, the actual values and setpoint valuesare present as analog signals, for example in the form of electricalvoltages or currents. As microprocessors can only process digitalsignals, the analog signals must be digitized before they can beprocessed by the microprocessor. The digitization is usually carried outin such a way that an analog/digital converter converts an electricalvoltage between 0 V and +5 V into a digital signal which is suitable forprocessing by a microprocessor. A voltage of 0 V in this casecorresponds to a signal value of 0%, and a voltage of +5 V correspondsto a signal value of 100%. In order also to process voltages with adifferent signal range, for example from 0 V to +10 V or from −10 V to+10 V, or currents with a signal range from for example 0 mA to 20 mA,the signals must have previously been converted into the signal range of0 V to +5 V which is provided for the analog/digital conversion. Forthis purpose, depending on the application case, circuit arrangementsare used which convert a voltage into a voltage, or circuit arrangementswhich convert a current into a voltage. It is thus necessary to stockrespective different circuit arrangements for the different electricalinput variables.

[0003] The invention is based on the object of providing a circuitarrangement of the type mentioned at the beginning which makes itpossible to convert the electrical input variables with different signalranges into an impressed output voltage for a common signal range.

[0004] This object is achieved by means of the features distinguished inclaim 1. The invention brings about a reduction in the variety of typesand thus lowers the costs for stockkeeping. Furthermore, it is alsopossible later to use actual value transmitters which have a differentsignal range from the originally provided actual value transmitters. Inthis case, the same circuit arrangement can continue to be used toconvert the input variable.

[0005] Advantageous developments of the invention are distinguished inthe subclaims. They relate to refinements for the advantageous circuitimplementation of the circuit arrangement according to the invention.

[0006] The invention is explained in more detail below with its furtherdetails by reference to an exemplary embodiment illustrated in thedrawings. In said drawings:

[0007]FIG. 1 shows a basic circuit diagram of the circuit arrangementaccording to the invention,

[0008]FIG. 2 shows a detailed circuit diagram of the circuit arrangementillustrated in FIG. 1,

[0009]FIG. 3 shows a refinement of the first arithmetic circuit,

[0010]FIG. 4 shows a refinement of the second arithmetic circuit, and

[0011]FIG. 5 shows the block circuit diagram of a device forautomatically sensing and evaluating measured values with a circuitarrangement according to the invention.

[0012] In the figures, identical components are provided with identicalreference symbols.

[0013]FIG. 1 shows the basic circuit diagram of an electrical circuitarrangement 10. The circuit arrangement 10 converts an electrical inputvariable which is present as a voltage ue or as a current ie into animpressed output voltage ua which is proportional to the respectiveinput variable. The input voltage ue or the current ie are fed to thecircuit arrangement 10 via input terminals 11 and 12. The output voltageua is present at output terminals 13 and 14. The output terminal 14 isconnected to reference potential. A first arithmetic circuit 15 withinput terminals 16 and 17 and output terminals 18 and 19 converts avoltage ue1 fed to it into an impressed voltage ua1. The gain factor ofthe arithmetic circuit 15 is designated by k1, and the relationshipua1=k1×ue1 therefore applies. The voltage ue present at the inputterminals 11 and 12 is fed to the arithmetic circuit 15. The details ofthe arithmetic circuit 15 are described further below with reference toFIGS. 2 and 3. A second arithmetic circuit 20 with input terminals 21and 22 and output terminals 23 and 24 converts a voltage ue2 fed to itinto an impressed voltage ua2. The gain factor of the arithmetic circuit20 is designated by k2, and the relationship ua2=k2×ue2 thereforeapplies. The arithmetic circuit 20 is fed the voltage ue2 which dropsacross a resistor 25. The resistor 25 is connected via a switch 26 tothe input terminals 11 and 12. If the switch 26 is closed, the currentie flows across the resistor 25 and the voltage ue2 which drops acrossthe resistor 25 is proportional to the current ie. Details of thearithmetic circuit 20 are described further below with reference toFIGS. 2 and 4. A changeover switch 27 connects, as a function of itsswitched setting, the output terminal 18 of the arithmetic circuit 15 orthe output terminal 23 of the arithmetic circuit 20 to the outputterminal 13 of the circuit arrangement 10. The output terminal 19 of thearithmetic circuit 15 and the output terminal 24 of the arithmeticcircuit 20 and the output terminal 14 of the circuit arrangement 10 areconnected to one another and are at reference potential. The switch 26and the changeover switch 27 are illustrated as controlled switcheswhose switched settings are determined by a control voltage ust1.However, it is also possible to implement the switch 26 and/or thechangeover switch 27 in the form of bridges, for example solder bridgesor plug-in bridges. In this case no control voltage is necessary.

[0014] If the electrical input voltage which is to be converted into thevoltage ua is a voltage ue, the control voltage ust1 is selected in sucha way that the switch 26 is opened and the changeover switch 27 connectsthe output terminal 18 to the output terminal 13. In this case, thevoltage ua is equal to the voltage ua1. For the relationship between theoutput voltage ua and the voltage ue, the relationship ua=k1×ue applies.

[0015] If the electrical input variable which is to be converted intothe voltage ua is a current ie, the control voltage ust1 is selected insuch a way that the switch 26 is closed and the changeover switch 27connects the output terminal 23 to the output terminal 13. In this case,the voltage ua is equal to the voltage ua2. For the relationship betweenthe output voltage ua and the current ie the following relationshipapplies: ua=k2×R25×ie, the value of the resistor 25 which converts thecurrent ie into the voltage ue2 being designated by R25.

[0016]FIG. 2 shows a detailed circuit diagram of the circuit arrangement10 illustrated in FIG. 1. The arithmetic circuit 15 contains anoperational amplifier 31 whose output is connected to the outputterminal 18. The series circuit of two resistors 32 and 33 is arrangedbetween the input terminal 16 and the output of the operationalamplifier 31. The connecting point of the resistors 32 and 33 isconnected to the inverting input of the operational amplifier 31. Theseries circuit of two resistors 34 and 35 is arranged between the inputterminal 17 and reference potential. The connecting point of theresistors 34 and 35 is connected to the non-inverting input of theoperational amplifier 31. The output voltage ua1 of the arithmeticcircuit 15 is set at such a level that the voltage fed to the invertinginput of the operational amplifier 31 is equal to the voltage present atthe non-inverting input of the operational amplifier 31. The gain factork1 of the arithmetic circuit 15 is determined by the values of theresistors 32 to 35. In the present exemplary embodiment, the resistors33 and 35 are of equal size, and the resistors 32 and 34 are each twiceas large as the resistors 33 and 35. The gain factor k1 obtained withthis wiring of the operational amplifier 31 is k1=0.5.

[0017] The arithmetic circuit 20 has basically the same design as thearithmetic circuit 15. The arithmetic circuit 20 contains an operationalamplifier 36 whose output is connected to the output terminal 23. Theseries circuit of two resistors 37 and 38 is arranged between the inputterminal 21 and the output of the operational amplifier 36. Theconnection point of the resistors 37 and 38 is connected to theinverting input of the operational amplifier 36. The series circuit oftwo resistors 39 and 40 is arranged between the input terminal 22 andreference potential. The connecting point of the resistors 39 and 40 isconnected to the non-inverting input of the operational amplifier 36.The output voltage ua2 of the series circuit 20 is set at such a levelthat the voltage fed to the inverting input of the operational amplifier36 is equal to the voltage present at the non-inverting input of theoperational amplifier 36. The gain factor k2 of the arithmetic circuit15 is determined by the values of the resistors 37 to 40. In the presentexemplary embodiment, the resistors 33 and 40 are of equal size, theyare each 2.5 times as large as the resistors 37 and 39. This wiring ofthe operational amplifier 36 results in a gain factor k2 of k2=2.5.

[0018] The switch 26 illustrated in FIG. 2 has an optocoupler 41 whichis illustrated only schematically and has a phototransistor 41 a and alight emitting diode 41 b. If current flows via the light emitting diode41 b, it lights up and drives the phototransistor 41 a into theconductive state. In the conductive state, the phototransistor 41 aconnects the input terminal 12 of the circuit arrangement 10 to one ofthe terminals of the resistor 25 via a diode 42. The diode 42 preventscurrent flowing from the input terminal 11 of the circuit arrangement 10to the input terminal 12 if the voltage at the input terminal 11 ishigher than the voltage at the input terminal 12. The light emittingdiode 41 b is arranged between a resistor 43 and a transistor 44. Tworesistors 45 and 46 form a voltage divider whose tap is connected to thebase of the transistor 44. If a positive control voltage ust1 is fed tothe resistor 46, the transistor 44 switches on, current flows via thelight emitting diode 41 b from a constant voltage Uk1 via the resistor43 and the transistor 44, and the light emitting diode 41 b switches thephototransistor 41 a into the conductive state. The resistor 43 limitsthe current flowing via the light emitting diode 41 b, and also thecurrent flowing via the phototransistor 41 a permits the currentamplification of the optocoupler 41. The control voltage ust1 and thevoltage Uk1 are each selected as +5 V in this exemplary embodiment. Ifthe control voltage ust1 is zero, the transistor 44 switches off and thephototransistor 41 a also switches off.

[0019] The inputs of the changeover switch 27 are designated below by 27u and 27 i. The input 27 u is connected via a resistor 47 to the outputterminal 18 of the arithmetic circuit 15. In addition, the input 27 u isconnected to reference potential via a diode 48 and to a constantvoltage Uk2 via a further diode 49. The diodes 48 and 49 limit, togetherwith the resistor 47, the voltage which is present at the input 27 u andis designated below by ua1*. In a corresponding way, the voltage whichis fed to the input 27 i of the changeover switch 27 and is designatedbelow by ua2* is limited by a resistor 50 and two diodes 51 and 52. Thetwo limiting circuits prevent the voltages ua1* and ua2* being higherthan the total of the voltage Uk2 and the conducting state voltage ofthe diodes 49 and 52 or more negative than the conducting state voltageof the diodes 48 and 51.

[0020] The input 27 u of the changeover switch 27 is additionallyconnected to a constant voltage Uk3 via a resistor 53 and a switch 54.The switched setting of the switch 54 is determined by a second controlvoltage ust2. When the switch 54 is closed, the resistors 47 and 53 forma voltage divider which is supplied at one of its ends with the voltageua1 and at the other end with the voltage Uk3.

[0021] Electronic analog switches which are driven by a low-powerdigital control signal are used as changeover switch 27 and switch 54.In the component which is marketed by the company National Semiconductorunder the designation CD4053BM/CD4053BC, three electronic changeoverswitches are combined in one common housing. Such a component requiresless space on the circuit board. The changeover switches have a lowlevel of susceptibility to faults because they do not contain anymechanical contacts which can be subject to wear in the course of time.The control voltages ust1 and ust2 serve as digital control signals. Inthe exemplary embodiment illustrated here, the changeover switch 27 andthe switch 54 assume the switched settings shown at ust1=0 V and ust2=0V, respectively. At ust1=+5 V and ust2=+5 V the changeover switch 27 andthe changeover switch 54, respectively, assume the other switchedsetting.

[0022] An impedance converter 55 is connected downstream of thechangeover switch 27. The impedance converter 55 is composed of anoperational amplifier 56 whose output is connected to its invertinginput and whose non-inverting input is at the voltage ua1* or ua2* as afunction of the setting of the changeover switch 27. Owing to the highinput resistance of the impedance converter 55 there is then virtuallyno loading of the voltages ua1* or ua2*.

[0023] A filter 57, which is formed from a resistor 58 and a capacitor59, is connected downstream of the impedance converter 55. The filter 57ensures that the output voltage ua of the circuit arrangement 10 issmooth.

[0024] For the conversion of a unidirectional input voltage with a valuerange of for example 0 V to +10 V into a unidirectional output voltagewith a value range of 0 V to +5 V, the switches 26 and 54 are opened andthe changeover switch 27 conducts the voltage ua1* to the impedanceconverter 55. In addition, the input terminal 11 of the circuitarrangement 10 is connected to reference potential. The positive voltageis therefore present at the input terminal 12. Owing to the relationshipua1=k1×ue1, a value range of 0 V to +5 V is obtained for the voltage ua1when k1=0.5. Owing to the high input resistance of the impedanceconverter 55, no current flows via the resistor 47 and the voltage ua1*is equal to the voltage ua1. If the voltage Uk2 is selected to be equalto +5 V, no limiting of the voltage ua1* takes place for a value rangeof 0 V to +5 V. The output voltage ua of the circuit arrangement 10 isthe voltage ua1* smoothed by the filter 57. The input terminal 21 of thearithmetic circuit 20 is connected to reference potential. As the switch26 is opened, no current flows via the resistor 25, i.e. the inputterminal 22 of the arithmetic circuit is also at reference potential.Owing to the relationship ua2=k2×ue2, the voltage ua2 becomes zero whenk2=2.5. As no current flows via the resistor 50, ua2*=0 V also applies.This value lies within the response limits of the limiting circuitformed from the resistor 50 and the diodes 51 and 52.

[0025] For the conversion of a bidirectional input voltage with a valuerange of for example −10 V to +10 V into a unidirectional output voltagewith a value range of 0 V to +5 V, the switch 26 is opened, the switch54 is closed and the changeover switch 27 feeds the voltage ua1* to theimpedance converter 55. In addition, the input voltage 11 of the circuitarrangement 10 is connected to reference potential. A voltage which canassume both positive and negative values is present at the inputterminal 12. Owing to the relationship ua1=k1×ue1, a value range of −5 Vto +5 V results for the voltage ua1 when k1=0.5. When the switch 54 isclosed, the resistors 47 and 53 form a voltage divider which is suppliedwith the voltage ua1 by the arithmetic circuit 15, and whose other sideis fed the voltage Uk3. With Uk3=+5 V and resistors 47 and 53 which areselected to have the same size, a value range of the voltage ua1* of 0 Vto +5 V is obtained for the value range of the voltage ua1 of −5 V to +5V. Owing to the high input resistance of the impedance converter 55,there is no loading of the voltage divider formed from the resistors 47and 53 by the following circuit parts. If the voltage Uk2 is selected—asstated above—to be equal to +5 V, there is no limiting of the voltageua1* for a value range from 0 V to +5 V. The output voltage ua of thecircuit arrangement 10 is the voltage ua1* smoothed by the filter 57. Asin the previously treated case of the conversion of a unidirectionalvoltage, the input terminal 21 of the arithmetic circuit 20 is connectedto reference potential. Since the switch 26 is open, no current flowsvia the resistor 25, i.e. the input terminal 22 of the arithmeticcircuit is also at reference potential. Owing to the relationshipua2=k2×ue2, the voltage ua2 becomes zero when k2=2.5. Since no currentflows via the resistor 50, ua2*=0 V also. This value is thus also withinthe response thresholds of the limiting circuit formed from the resistor50 and the diodes 51 and 52.

[0026] For the conversion of a unidirectional input current ie with avalue range of for example 0 mA to +20 mA into a unidirectional outputvoltage with a value range of 0 V to +5 V, the switch 26 is closed andthe changeover switch 27 feeds the voltage ua2* to the impedanceconverter 55. The current ie flows from the input terminal 12 via thephototransistor 41 a, the diode 42 and the resistor 25 to the inputterminal 11 of the circuit arrangement 10. Given a resistance value ofR25=100Ω, the voltage ue2, whose voltage range is between 0 V and 2 V,drops across the resistor 25. Owing to the relationship ua2=k2×ue2, avalue range of 0 V to +5 V is obtained for the voltage ua2 when k2=2.5.Owing to the high input resistance of the impedance converter 55, nocurrent flows via the resistor 50 and the voltage ua2* is equal to thevoltage ua2. If the voltage Uk2 is selected to be equal to +5 V, nolimiting of the voltage ua2* takes place for the value range from 0 V to+5 V. The output voltage ua of the circuit arrangement 10 is the voltageua2* smoothed by the filter 57. The voltage drop across the resistor 25which is increased by a forward voltage of the diode 42 is fed to theinput terminals 16 and 17 of the arithmetic circuit 15 as input voltageue1. If the silicon diode with a forward voltage of the diode 42 of 0.7V is assumed when there is a flow of current, a value range of 0 V to2.7 V is obtained for the input voltage ue1 of the arithmetic circuit15. Owing to the relationship ua1=k1×ue1 where k1=0.5, the voltage ua1assumes values in the range from 0 V to 1.35 V. Irrespective of thesetting of the switch 54, the range of the voltage ua1* lies within theresponse limits of the limiting circuit formed from the resistor 47 andthe diodes 48 and 49.

[0027] If the switch 26 is closed inadvertently or owing to a fault whenthere is a positive voltage at the input terminal 12, the currentflowing via the photoresistor 41 a, the diode 42 and the resistor 25 is,as described above, limited, so that in the case of a fault there is norisk of damage to components of the circuit arrangement. In addition,the voltage ua2* is limited by the resistor 50 and the diode 52connected to the voltage Uk2. When a silicon diode is used, the voltageua2* is limited to approximately 5.7 V and to approximately 5.3 V in thecase of a germanium diode. Here, the forward voltage of a silicon diodewith 0.7 V and the forward voltage of a germanium diode with 0.3 V aretaken into account. When germanium diodes are used, a voltage which canassume values between −0.3 V and 5.3 V is thus present at the input 27 iof the changeover switch 27. The use of germanium diodes is advantageousin particular if a microprocessor is connected to the terminals 13 and14. The diode 42 prevents a flow of current via the resistor 25 and viathe phototransistor 41 a if a voltage which is negative with respect tothe input terminal 11 is present at the input terminal 12 of the circuitarrangement 10. As no current flows via the resistor 25 in this case,the input terminals 21 and 22 of the arithmetic circuit 20 are virtuallyat reference potential and the voltage ua2 is zero. If an electronicanalog switch is used as changeover switch 27, it is necessary that itsinputs are not supplied with a voltage which is more negative than itsnegative supply voltage.

[0028]FIG. 3 shows an extension of the arithmetic circuit 15 illustratedin FIG. 2. A capacitor 61 is arranged parallel to the resistor 33. Afurther capacitor 62 is arranged parallel to the resistor 35. Theadditionally provided capacitors 61 and 62 are used to smooth the outputvoltage ua1 of the arithmetic circuit 15.

[0029]FIG. 4 shows an extension of the arithmetic circuit 20 illustratedin FIG. 2. The extension of the arithmetic circuit 20 is constructed ina way corresponding to the extension of the extension of the arithmeticcircuit 15 illustrated in FIG. 3. A capacitor 65 is arranged parallel tothe resistor 38. A further capacitor 66 is arranged parallel to theresistor 40. The additionally provided capacitors 65 and 66 are used tosmooth the output voltage ua2 of the arithmetic circuit 20.

[0030]FIG. 5 shows, as an application example of the circuit arrangementaccording to the invention, a device for the automated sensing andevaluation of a series of different measured values as a block circuitdiagram. The values which are to be measured, for example pressure,differential pressure, travel or temperature, are converted intoelectrical signals by measuring converters 71 to 74. Depending on thedesign of the measuring converters, the electrical output signal is aunidirectional voltage, a bidirectional voltage or a unidirectionalcurrent. An electronic changeover switch 75 selects in each case one ofthese electrical signals. The circuit arrangement 10 according to theinvention converts the electrical signal selected by the electronicchangeover switch 75 into a unidirectional voltage with a uniform valuerange of—as described above—for example 0 V to +5 V. This voltage is fedto a measured value processing device 76 which converts the value rangefrom 0% to 100% of the measured value fed to it into the correspondingphysical unit. The measured value can be displayed and/or indicated. Itcan also be passed on via an information channel 77. The informationchannel 77 can be of an analog or digital type here. The interrogationof the individual measured values can be carried out under programcontrol. For this purpose, a control signal, which is used to select thedesired measurement variable, is fed to the changeover switch 75 by thedevice 76 via a signal line 78. At the same time, control signals ust1and ust2 which set the switches 26 and 54 and the changeover switch 27of the circuit arrangement 10 in accordance with the transmissionbehavior necessary for the selected measurement variable are fed to thecircuit arrangement 10 via further signal lines 79 and 80.

1. Electrical circuit arrangement for converting an electrical inputvariable (voltage or current) into an impressed electrical outputvoltage, there being a predefined relationship between the inputvariable and the output voltage, characterized by the fact that a firstarithmetic circuit (15) is provided which converts a voltage (ue1) fedinto it in a first impressed voltage (ua1), that a second arithmeticcircuit (20) is provided which converts an input voltage (ue2) fed to itinto a second impressed voltage (ua2), that the voltage (ue) present atthe input terminals (11, 12) of the circuit arrangement (10) is fed tothe first arithmetic circuit (15), that the voltage (ue2) which dropsacross a resistor (25) which can be connected to the input terminals(11, 12) of the circuit arrangement (10) is fed to the second arithmeticcircuit (20), that, for the conversion of a voltage (ue), the outputvoltage (ua1) of the first arithmetic circuit (15) is used as the outputvoltage (ua) of the circuit arrangement (10), and that, for theconversion of a current (ie), the current (ie) is fed to the resistor(25) and the output voltage (ua2) of the second arithmetic circuit (20)is used as the output voltage (ua) of the circuit arrangement (10). 2.The circuit arrangement as claimed in claim 1, characterized by the factthat the resistor (25) is connected to the input terminals (11, 12) ofthe circuit arrangement (10) via a switch (26), and that a changeoverswitch (27) connects the output (18 or 23) of an arithmetic circuit (15,20) to the output (13) of the circuit arrangement (10).
 3. The circuitarrangement as claimed in claim 2, characterized by the fact that, forthe conversion of a voltage (u_(e)), the switch (26) is opened and thechangeover switch (27) feeds the output voltage (ua1) of the firstarithmetic circuit (15) to the output (13) of the circuit arrangement(10), and that, for the conversion of a current (i_(e)), the switch (26)is closed and the changeover switch (27) feeds the output voltage (ua2)of the second arithmetic circuit (20) to the output (13) of the circuitarrangement (10).
 4. The circuit arrangement as claimed in one of thepreceding claims, characterized by the fact that the first arithmeticcircuit (15) has a first operational amplifier (15), that the invertinginput of the first operational amplifier (31) is connected to its outputvia a second resistor (33), and to the first input terminal (16) of thefirst arithmetic circuit (15) via a third resistor (32), that thenon-inverting input of the first operational amplifier (31) is connectedto reference potential (⊥) via a fourth resistor (35), and to the secondinput terminal (17) of the first arithmetic circuit (15) via a fifthresistor (34), that the second arithmetic circuit (20) has a secondoperational amplifier (36), that the inverting input of the secondoperational amplifier (36) is connected to its output via a sixthresistor (38) and to the first input terminal (21) of the secondarithmetic circuit (20) via a seventh resistor (37), that thenon-inverting input of the second operational amplifier (36) isconnected to reference potential (⊥) via an eighth resistor (40) and tothe second input terminal (22) of the second arithmetic circuit (20) viaa ninth resistor (39).
 5. The circuit arrangement as claimed in claim 4,characterized by the fact that the resistors (32 to 35; 37 to 40) whichare connected to the inputs of the operational amplifiers (31, 36) aredimensioned according to the desired relationship between the inputvariable (ue, ie) and the output voltage (ua).
 6. The circuitarrangement as claimed in claim 5, characterized by the fact that acapacitor (61, 62, 65, 66) is arranged in each case in parallel with thesecond resistor (33), the fourth resistor (35), the sixth resistor (38)and the eighth resistor (40).
 7. The circuit arrangement as claimed inone of claims 2 to 6, characterized by the fact that an impedanceconverter (55) is arranged between the output of the changeover switch(27) and the output (13) of the circuit arrangement (10).
 8. The circuitarrangement as claimed in claim 7, characterized by the fact that afilter (57) is connected downstream of the impedance converter (55). 9.The circuit arrangement as claimed in claim 7 or claim 8 characterizedby the fact that the output (18) of the first arithmetic circuit (15) isconnected to one (27 u) of the inputs of the changeover switch (27) viaa tenth resistor (47), that the output (23) of the second arithmeticcircuit (20) is connected to the other input (27 i) of the changeoverswitch (27) via an eleventh resistor (48), that the one input (27 u) ofthe changeover switch (27) is connected to a first constant voltage (⊥)via a first diode (48) and to a second constant voltage (Uk2) via asecond diode (49), and that the other input (27 i) of the changeoverswitch (27) is connected to the first constant voltage (⊥) via a thirddiode (51) and to the second constant voltage (Uk2) via a fourth diode(52).
 10. The circuit arrangement as claimed in claim 9, characterizedby the fact that one (27 u) of the inputs of the changeover switch (27)is connected to a third constant voltage (Uk3) via a twelfth resistor(53) and a second switch (54).
 11. The circuit arrangement as claimed inone of claims 2 to 10, characterized by the fact that the first switch(26) has an optocoupler (41).
 12. The circuit arrangement as claimed inclaim 11, characterized by the fact that a fifth diode (42) is arrangedbetween the optocoupler (41) and the first resistor (26).
 13. Thecircuit arrangement as claimed in one of claims 2 to 12, characterizedby the fact that the changeover switch (27) is an electronic analogswitch.
 14. The circuit arrangement as claimed in one of claims 10 to13, characterized by the fact that the second switch (54) is anelectronic analog switch.
 15. The use of a circuit arrangement asclaimed in one of claims 2 to 14, in which the switches (26, 54) andchangeover switches (27) which are provided for setting the transmissionbehavior of the circuit arrangement can be controlled by electricalsignals (ust1, ust2) in order to adapt different input signals (ue, ie)in a device for automatically sensing and evaluating measured values.